Deliverables

The deliverables includes the following:

• Datasheet

• Integration Application Note

• Characterization Report

• Hard GDS (GDSII)

• Layout Abstract for Top Level Connectivity (LEF)

• Encrypted Netlist for Simulations (for ADCs)

• Behavioral Model (Verilog, Verilog-A)

• Layout versus Schematic (LVS) Verification Netlist

• Timing Model (.LIB)

• Customer Support

• Additional Documentation (on request)