Technology

Cambridge Analog Technologies, Inc. is engaged in developing high quality robust ultra low power analog to digital converters and other analog circuits based on its proprietary PUMA^TM (Precision Ultra Micro-power Amplification) circuit technology that allows for power consumptions that is an order of magnitude lower than commercially available state-of-the-art analog counterparts. It is fully compatible with deep-sub-micron processes and especially suited for integration in complex SoCs.

CAT also has Sabre^TM technology for providing a one-stop shob for all you PLL needs.

CAT has more than 30 patents worldwide (7 US patents issued, 23 pending) including all fundamental and supporting aspects of the ultra low power technology.

CAT's PUMA^TM Circuit Technology

Most switched-capacitor circuits process the analog signal through a sequence of simple mathematical functions and modest interstage gains. For precision applications such as high resolution ADCs, it is critical for the error in these interstage gains to be very small. Typically, power-hungry high-gain high-speed operational amplifiers placed in feedback are utilized to achieve these precision gains. Operational amplifiers, however, are becoming increasing difficult to design and excessively power hungry in modern deep submicron processes.

CAT’s PUMA^TM (Precision Ultra Micro-power Amplification) circuit technology allows for eliminating these opamps while still maintaining the precision of these inter-stage gains with no change to the traditional architecture, switch-fabric or the interfaces of these switched-capacitor circuits. Consequently, this technique can utilize the wealth of information that already exists for switched capacitor circuits in a variety of fields such as ADCs, DACs, PGAs, and Filters. This technique results in an order of magnitude reduction in power consumption of ADCs depending on their speed and resolution.

 CAT seeks to apply this technology towards IP blocks catering to a wide array of applications ranging from ultra low-power low-frequency biomedical applications to high frequency applications such as 10GBase-T and UWB.

This material is based upon work supported in part by the National Science Foundation under Grant No. 0839225. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.

CAT's Sabre PLL Technology

CAT's Sabre family of PLL products are based on a proprietary technology that is able to achieve the highest levels of jitter and noise performance in an alldigital implementation, taking advantage of digital scaling to minimize power and area, and to maximize flexibility and ease of integration for the system designer. For integer-N digital clocking applications, CAT offers SabreEDGE™ PLL that have excellent noise performance across a very wide range of output frequency, jitter, and power requirements. For wireless and high-speed wireline applications that require full fractional-N frequency synthesis with the lowest levels of phase noise achievable in silicon, CAT offers SabreSYNTH™ PLL.